Electrical Engineering - Finfet

The following will be notes taken on the subject of FinFets

• Summary
• Classical Mosfet
• Transistor that operates by using an Electrical field to invert the channel allowing conduction from source to drain

• The Classical Mosfet Dimensions
• Include length the short distance in this picture, Width is the longer dimension
• Functionality
• Length reduction results in loss of control over the channel
• performance reduction

• Finfet
• Goal
• solve performance reduction caused by smaller sizes 
• Wrap the gate electrode around the channel

• Thin fin of sillicon acts as the channel and it is encased by the gate electrode
• Silicon fin surrounded by extension implant and poly oxide
• Premise
• di-electric and metal gate allows for a stronger e-field to be formed as it increases the dimensions of the gate effective using the height/thickness of the fin as the channel length allowing for a decrease in overall size when compared to a typical Mosfet

• Source and Drain can be wrapped in silicon germanium or silicon carbon stressors just like classical transistors
• Shown below is a representation of a finfet design used for production

• The gate electrode is uniform for ease of construction

• Clarification of terminology
• After seeing the design used for production, we can see that it is nearly identical to the construction of the tri-gate

• The only difference is that a tri-gate includes multiple sources and drains whereas the finfet description shows only a single source and drain but the process of construction seems identical, and terminology could be used interchangeably assuming you're fine with annoying Intel
• The original papers indicate that the original process of the finfet did not wrap around on top of the fin, lowering the overall z or height of the overall transistor but this is too complicated of a process for mass production so the standard finfet is equivalent to the tri-gate which does wrap around 

• Benefits
• Maintain performance which includes
• Conductivity when turned on
• Insulation when turned off
• Finfet in relation to a standard mosfet reduces electron tunneling effect when insulation is small
• Main issues are - weaker dielectric, small size
• Finfet significantly increases volume of dielectric reducing leakage currents
• increase switching speed
• due to lower size due to gate capacitance being smaller
• note - non-issue in modern constructions, interface delay between metals is more significant as we get to smaller scale
• Lower's Voltage requirements
• increases lifetime/efficiency of product per charge
• Company Promises
• estimation, 2-5% higher price in exchange for 37% speed increase and 90% reduction in leakage current

• Complications
•  Adds complexity to construction process
• possible reduction in yield
• can increase price significantly above 2-5% estimate for the company overall
• Depending on process
• high k-dielectrics are more expensive, but already required as transistor size decreases
• Increased modeling difficulty
• geomotries now are first order effects
• random fluctuations in manufacturing can now cause deviations in result
• impacts possible econcomic forecasts for the division
• Verification
• requires new software to ensure design rules for fin to fin spacing is followed

• History
• construction process has roots in 1990s

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